AMD 3D cache breakthrough

(Source: AMD)   During AMD’s CEO Lisa Su’s Computex keynote presentation, the rightfully proud president revealed AMD’s new secret weapon for improved performance of the company’s Zen processors. With TSMC’s help, AMD will bond the L3 cache directly to and on top of the Zen CPU via Vias (through-silicon vias—TSVs). In addition to the new 3D stacking approach, the size of the cache is enlarged to 64MB. The cache stacking makes use of TSMC’s SoIC Chip-on-Wafer technology introduced last August. AMD’s new stacking, copper-based high-density Zen3 CPU   This new semiconductor process technology does not require any software updates or