TechWatch

Flow Computing shows parallel processing compiler

Adding a PPU to an existing CPU design is not novel.

Jon Peddie

Flow Computing has begun alpha testing its compiler, which targets integration of its Parallel Processing Unit (PPU) into CPUs. The toolchain enables high-level code to be compiled into binaries optimized for hybrid CPU-PPU systems using the gem5 simulator. Tests show the PPU off-loads loop-intensive tasks, improving throughput without software changes. Flow’s architecture supports multiple ISAs and scales with added PPUs. While validation continues, market success depends on differentiation, as the company enters a competitive field with established IP vendors and emerging AI hardware start-ups.Flow Computing has initiated alpha-level testing of its source-to-binary compilation toolchain, developed to support integration of its
...

Enjoy full access with a TechWatch subscription!

TechWatch is the front line of JPR information gathering service, comprising current stories of interest to the graphics industry spanning the core areas of graphics hardware and software, workstations, gaming, and design.

A subscription to TechWatch includes 4 hours of consulting time to be used over the course of the subscription.

Already a subscriber? Login below

This content is restricted

Subscribe to TechWatch