Neuromorphic computing is moving from research into early commercial reality, with several companies introducing chips that mimic brain-like processing. These architectures aim to deliver AI inference with far lower power than conventional processors by combining memory and compute and using event-driven operation. While still fragmented and early, the emergence of shipping products and new approaches signals growing momentum. The field now spans digital, analog, and in-memory designs, each targeting edge AI applications with different trade-offs in performance, efficiency, and scalability. We see neuromorphic having the greatest long-term success in device inference and IoT.

Neuromorphic computing draws from the structure of the biological brain, replacing the sequential von Neumann model with architectures that co-locate memory and compute, operate asynchronously, and communicate through spike-based events. This approach enables parallel processing with reduced energy consumption, which makes it attractive for AI inference at the edge. Carver Mead established the foundation in the late 1980s with analog circuits that mimicked neural behavior, and the field has since evolved into multiple architectural paths.
BrainChip represents the first company to commercialize a neuromorphic processor. Its Akida architecture, introduced in 2021, brought spiking neural network (SNN) processing into production systems. Unlike earlier efforts from Intel and IBM, which remained in research environments, BrainChip targeted practical deployment. Akida supports both SNN and conventional CNN workloads, which broadens its applicability across automotive, industrial sensing, and IoT markets. The company plans volume production of the AKD1500 in 2026 and continues development of next-generation devices while expanding its customer base and IP licensing strategy.
Other players approach the market from different angles. Innatera introduced the Pulsar neuromorphic microcontroller in 2025, focusing on ultra-low-power edge applications. Its architecture combines analog SNN processing with digital control, which allows integration into conventional embedded systems. This positioning distinguishes it from earlier neuromorphic designs that focused primarily on research or specialized deployments.
A newer entrant, IMChip, explores a different path by using spintronic memristors as the compute medium. Founded in 2024, the company builds in-memory processors that physically emulate synaptic behavior rather than simulate it with CMOS transistors. This design merges storage and computation within the same device, which reduces data movement and enables continuous adaptation of weights. IMChip has demonstrated prototype devices and targets first silicon around 2028. The company’s approach introduces both opportunity and risk, as it departs from established semiconductor manufacturing processes.

Figure 1. Canonical neuromorphic block diagram, the reference architecture most chips follow. (Source: JPR)
The broader neuromorphic landscape divides into three main categories. Digital SNN processors, such as Intel’s Loihi and IBM’s TrueNorth, implement spike-based computation using CMOS logic. Analog and mixed-signal designs, including those from Innatera and IMChip, process signals in continuous domains to improve efficiency. A third group, which includes IBM’s NorthPole, Polyn, and Rayd, adopts neuromorphic principles without relying on spike timing, instead using digital, analog, or photonic methods to accelerate AI workloads.
The maturity gap across these approaches remains wide. Intel and IBM have built extensive research ecosystems with validated silicon and software tools, while newer companies operate at earlier stages with limited public data. Benchmark comparisons remain difficult, as architectures differ in compute models, data representation, and target workloads. Software support also varies, which affects developer adoption and system integration.
Despite these challenges, the field shows measurable progress. BrainChip and Innatera demonstrate that neuromorphic processors can move beyond research and into production. At the same time, experimental approaches such as IMChip’s memristor-based design suggest that further architectural changes may follow. These developments indicate that neuromorphic computing has entered an exploratory phase in which multiple design strategies compete to define practical implementations.
What do we think?
Neuromorphic computing shows steady progress but remains fragmented. BrainChip and Innatera validate commercial viability, while IMChip and others explore new compute models. The field lacks standardized benchmarks, mature software stacks, and consistent production scale. Neuromorphic processors will complement existing AI hardware in the near term rather than replace it. Long-term impact depends on execution, ecosystem development, and manufacturing readiness.
The transition from research prototypes to shipping neuromorphic chips marks an inflection point in AI hardware exploration. Multiple architectures now compete, from digital SNNs to analog and in-memory designs, which signals accelerating experimentation beyond conventional CMOS approaches. This inflection point does not yet indicate market disruption, but it shows that alternative compute models are gaining traction. If one architecture achieves scale and software support, it could reshape edge AI processing in future systems.
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