Founded in Shanghai in 2019, Biren Technology, also known as Biling Technology, is backed by China’s leading venture funds and government agencies, and raised 1.1 billion yuan (approximately $160 million) in its first round of funding.
The company announced their first GPU-compute chip in August 2022 with impressive specifications.
The BR100 was manufactured in TSMC’s 7 nm process and used 2.5D CoWoS packaging. The GPU has 77 billion transistors. The processor has 300MB of on-die cache and up to 64GB of HBM2e memory with a 2.3Gb/s bandwidth. It is compatible with PCIe Gen5 and 2.3TB/s CXL interfaces.
However, TSMC has suspended its production of the chips for Biren to comply with the US government’s new regulations, Bloomberg reported. The move comes after the Biden administration earlier this month announced new restrictions on exports of advanced chip technology to China.
TSMC has not reached a conclusion on whether the top-of-the-line Biren BR100 or the slower BR104 meets or exceeds the US government threshold on advanced AI chip technology restrictions, and decided to stop production and supply of the Biren chips for now.
In order for TSMC to continue manufacturing the BR100 or BR104 chips, Biren must prove their chips do not offer peak performance and chip-to-chip I/O performance equal to or greater than thresholds that are roughly equivalent to the Nvidia A100, or get an export license from the US Department of Commerce.
Biren strangely released a press statement on September 9, 2022, declaring that the slower BR104 was proven by MLPerf to beat the Nvidia A100.
|Biren claims a faster GPU-compute chip than Nvidia. (Source: Biren)|
Releasing such a statement less than two weeks after the US government ordered both AMD and Nvidia to stop exporting their respective MI250 and A100 and faster AI chips to China was not the best tactical or strategic move on Biren’s part.
The release and other data from Biren positions the BR100 well over the performance level the US government dictates. That specification is for processors with 600GB/s IO and 600 TOPS Perf. Under that definition, Nvidia’s A100, H100, AMD’s MI250X, Biren’s BR100, Graphcore’s Bow, Cerebras’s WSE, and others (like Intel’s Ponte Vecchio) qualify.
The BR100 uses two die and obtains a total performance and IO level of 2,048 TOPS of INT8, 896GB/s of die-to-die interconnect, 512GB/s of BLink, and 128GB/s of CXL 2.0. The specs are at an assumed 1 GHz clock for the compute elements, but these clocks can easily change, which highlights a major flaw in the regulation.
The IO speed limitation is met by the BLink and CXL 2.0 alone. The US regulations had a very extensive definition of TOPS, which differs from how Biren defines its TOPS figure. As a result, Biren has changed their specification in the hopes of avoiding sanctions by cutting down the product’s specs. The US government would have no way to validate that the eighth BLink was actually disabled.