Samsung introduces 3rd-generation HBM2E for HPC

Stacks eight 16Gb DRAM dies to 16GB with transfer speed at 3.2 Gbps

Jon Peddie


Samsung Electronics announced the launch of ‘Flashbolt,’ its third-generation high bandwidth memory 2E (HBM2E). The new 16-GB HBM2E is targeted at HPC systems for system manufacturers of supercomputers for AI-driven data analytics and state-of-the-art graphics systems.

“With the introduction of the highest performing DRAM available today, we are taking a critical step to enhance our role as the leading innovator in the fast-growing premium memory market,” said Cheol Choi, executive vice president of Memory Sales & Marketing at Samsung Electronics. “Samsung will continue to deliver on its commitment to bring truly differentiated solutions as we reinforce our edge in the global memory marketplace.”


Offering twice the capacity of the previous Aquabolt generation 8GB HBM2, the new Flashbolt also increases performance and power efficiency. The 16GB capacity is achieved by vertically stacking eight layers of 10-nm-class (1y) 16 Gb DRAM dies on top of a buffer chip. The HBM2E package is then interconnected with more than 40,000 through-silicon via (TSV) microbumps. Each 16Gb die contains over 5,600 of these microscopic holes.

Samsung’s Flashbolt provides a data transfer speed of 3.2 Gbps by leveraging a proprietary optimized circuit design for signal transmission while offering a memory bandwidth of 410 GB/s per stack. Samsung’s HBM2E can also attain a transfer speed of 4.2 Gbps, the maximum tested data rate to date, enabling up to a 538 GB/s bandwidth per stack in certain future applications. This would represent a 1.75× enhancement over Aquabolt’s 307 GB/s.

Samsung expects to begin volume production during the first half of this year. The company will continue providing its second-generation Aquabolt lineup while expanding its third generation Flashbolt offering aimed at the HBM premium memory market.