Imagination Technologies just published real-world performance numbers for its E-Series GPU, and the headline isn’t just raw speed; it’s the strategy behind it. Instead of bolting on separate accelerators for graphics, AI, and compute, Imagination bets that one GPU architecture and one software stack can handle all three workloads at once. We walk through the benchmarks behind that bet, including a new AI-powered upscaling technology, and what running everything through one unified pipeline means for chip designers building edge devices.
One chip fits all.
Imagination Technologies published the first performance data and live demonstrations for its E-Series GPU IP this week, alongside a new AI-accelerated upscaling technology called Neural Super Resolution. Both releases reinforce the company’s core bet: One GPU architecture and one software stack can run graphics, compute, and AI workloads together instead of requiring separate acceleration blocks for each.
Edge devices keep taking on more demanding applications, and chip designers keep responding by adding new acceleration blocks, software stacks, and data paths tuned for each specific workload. That approach adds real integration effort, and it risks leaving fixed-function capacity sitting unused once workload demand shifts to something the fixed block wasn’t built for. Different edge AI processors have started converging on a similar feature set instead, one that balances performance and efficiency against flexibility. The GPU makes a natural starting point for that convergence: It already combines parallel acceleration, a proven software ecosystem, general-purpose flexibility, and graphics functionality in one place.
For chip designers and system integrators, that fragmentation shows up directly on the bill of materials and in software-validation timelines. Every additional fixed-function block needs its own driver stack, its own toolchain, and its own qualification cycle, work that scales linearly with the number of specialized blocks a system integrates. A single GPU architecture that handles graphics, AI, and compute together collapses that validation burden into one software stack instead of several, a genuinely different maintenance profile for anyone shipping edge silicon across multiple product generations.
Figure 1. Imagination Technologies’ EXD-64 universal GPU. (Source: Imagination Technologies)
The E-Series, first announced last year, integrates programmable AI acceleration directly alongside the GPU’s rendering pipelines. That combination lets one processor and one software stack run workloads as different as generative AI, neural rendering, and gaming, independently or alongside CPUs and other accelerators. AI models and the operations underneath them keep evolving long after a chip’s architecture locks in, and E-Series addresses that directly through a familiar GPU-based programming model built on industry-standard APIs. Developers can implement new operators throughout a device’s entire lifecycle, accelerated through a Matrix Accelerator tightly integrated into the GPU itself, supporting both high- and low-precision operations including BF16, FP4, and MX data formats.
The firmware processor (FW) is a RISC-V. It’s a single-threaded processor with a 32 KB instruction cache, a 16 KB data cache, a 64 KB Instruction Tightly-Coupled Memory (ITCM) and a 64 KB Data Tightly-Coupled Memory (DTCM). It manages all GPU events directly, handles errors, manages priorities, and interacts directly with third-party blocks (like NPUs) using GPIO signals.
That architecture translates into real performance gains. E-Series reaches 4.7 times faster prefill performance than the previous D-Series generation for a typical edge language model. Running Qwen 3.5 4B specifically, a quad-core E-Series GPU at 1.5 GHz achieves a time to first token of 0.2 seconds and decode throughput of 150 tokens per second on a representative workload. Imagination is upstreaming an optimized backend for Llama.cpp to simplify porting, with native PyTorch and ONNX Runtime support following after.
Figure 2. One E-Series architecture, three workloads: graphics, AI, and neural rendering.
That precision flexibility matters as much as the raw throughput figures for ISVs building on this hardware. Supporting BF16, FP4, and MX formats natively inside the Matrix Accelerator means developers pick the precision that fits their specific accuracy and latency budget instead of working around whatever single format a fixed accelerator happened to ship with. Upstreaming Llama.cpp support specifically lowers the barrier for developers already running that framework elsewhere, letting them target E-Series without a separate porting effort for every new model release.
Performance gains extend well past headline AI applications into the foundational compute operations that run throughout AI, computer vision, signal processing, and general-purpose computing tasks. E-Series runs Conv2D kernels 4.4 times faster and GEMM kernels 4.8 times faster than the equivalent D-Series implementation. Matrix multiplication workloads can reach GPU utilization levels up to 89%.
Convergence opens new opportunities inside graphics pipelines directly, and Neural Super Resolution (NSR) puts that idea into practice. NSR is the name for the new upscaling model. It’s software, available as a library, and won’t appear in any hardware diagram, but it will be accelerated within the USC using the extra matmul acceleration. NSR applies E-Series’ matrix acceleration to the graphics pipeline through industry-standard extensions, combining a single-pass temporal upscaling approach with Imagination’s own self-compression solution, which strips out roughly 65% of the underlying network’s weights. That compression makes the resulting model more power-efficient than competing upscaling solutions, completing a typical 540p to 1080p upscale operation in as little as 2.3 ms on a single-core E-Series GPU at 1 GHz. Compared with native rendering, NSR delivers a significant frame rate increase and cuts memory bandwidth consumption in half, while keeping visual quality close to ground truth. NSR ships as a library inside the PowerVR SDK, with direct integrations for Unreal Engine and Godot.
Graphics stay central to E-Series, even as the architecture now handles everything else. The GPU supports DirectX 12 FL11_0 and delivers real-world gaming performance improvements of up to 54% compared with the previous-generation equivalent. A quad-core configuration scales past 60 fps for selected AAA desktop titles, and performance per watt improves up to 39%.
Imagination’s actual bet across all of this stays consistent: Chip designers get one architecture and one software stack instead of stitching together separate blocks for graphics, AI, and compute, and that consolidation matters more as edge workloads keep shifting faster than fixed-function hardware can adapt. The real test comes from adoption, not benchmarks: Whether ISVs actually build on E-Series broadly enough to prove one unified stack beats the fragmented alternative in production, not just in Imagination’s own demos.
What do we think?
The 4.7× prefill gain matters less than the precision flexibility underneath it: Native BF16, FP4, and MX support inside one Matrix Accelerator means E-Series adapts as models evolve, instead of locking designers into whatever format shipped at tape-out. NSR’s 65% weight compression is the more transferable technical achievement here, genuinely applicable well beyond Imagination’s own GPU line.
Inflection point. Converged GPU architectures handling graphics, AI, and compute together mark a real inflection point for edge silicon design: The industrywide pattern of bolting on a new fixed-function block for every workload runs into real limits as AI models keep changing faster than any chip’s tape-out cycle. If one GPU architecture proves out across gaming, generative AI, and neural rendering at once, chip designers stop treating AI acceleration as a separate line item and start treating it as a standard GPU capability.
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