Intel just put a date and a number on its robotics roadmap. Razor Lake-AX arrives in 2028 with about 700 TOPS of AI compute, 3.88 times today’s Panther Lake, and leaks add a large Xe3P iGPU and on-package memory. Intel has not named the precision behind that figure, so Jetson comparisons need extra care. We sort what Intel confirmed from what leaks suggest, and we list the questions ISVs, silicon teams, and CIOs should ask before they plan any designs around it.
At the Semiconductors Powering Humanoids conference in South Korea on October 16, Intel Senior Vice President Cho Min-sung confirmed Razor Lake-AX. According to The Elec, it is an SoC that Intel plans to ship in 2028 with about 700 TOPS of AI compute. That figure equals 3.88 times the 180 TOPS of Intel’s current Panther Lake chips. Leaks about the part had circulated for months, and the October talk marks the moment Intel acknowledged it publicly.
Intel’s robotics path now runs in three steps: Panther Lake today at up to 180 TOPS of combined AI performance, Nova Lake for robotics in early 2027, and Razor Lake-AX in 2028. Intel designed Razor Lake-AX for perception, decision-making, and real-time control in humanoids and autonomous mobile robots (AMRs). Intel already sells Robinson Bay, a robotics development platform based on Panther Lake. Its software includes OpenVINO, Physical AI Studio, and Robotics AI Suite. Intel expects customers to begin mass-producing AMRs in 2027 and humanoids in 2028, and Razor Lake-AX could give those machines far more compute without a separate GPU.
Intel has not specified the numerical precision behind the 700 TOPS, and it has not broken out the CPU, GPU, and NPU contributions. One report assumes INT8 or FP8, and Intel has not confirmed that. Intel has also disclosed no power envelope, memory capacity, or graphics performance. The 180 TOPS figure for Panther Lake sums its CPU, GPU, and NPU, and the 700 TOPS target likely follows the same convention. A TOPS count at INT8 and the same count at FP4 describe different machines. Silicon teams should treat 700 TOPS as a platform-level target until Intel publishes a precision.
The Elec compares the target with the 275 TOPS of Nvidia’s Jetson AGX Orin, a 2.5× gap. That comparison reaches back a generation. Nvidia now ships Jetson Thor at up to 2,070 sparse FP4 TFLOPS, and its T3000 and T2000 modules deliver 865 and 400 sparse FP4 TFLOPS, respectively. Sparse FP4 TFLOPS and unspecified TOPS measure different things, so no valid ratio exists until Intel names a precision. Thor will also hold the market for about two years before Razor Lake-AX ships.
Table 1. AI compute comparison.
Leaks fill in much of the hardware, and Intel has confirmed none of it. The reports describe an iGPU in 16-core and 32-core versions using Xe3P graphics IP, which descends from Panther Lake’s Xe3. The 32-core version would deliver nearly three times the performance of today’s Arc B390 iGPU. The GPU die measures about 162.84 mm², which implies a large package. Intel reportedly brings back on-package LPDDR5X or LPDDR6 memory to feed that iGPU, a design it last used in Lunar Lake. The package likely uses EMIB and Foveros 3D interconnects in a BGA-4326 form factor with 4,326 pins, similar to Intel’s Xeon CPUs.
Table 2 Razor Lake-AX: confirmed and reported.
Razor Lake-AX descends from Nova Lake-AX, a design Intel reportedly shelved. That plan paired 48 Xe3 cores with a 28-core CPU cluster. Razor Lake-AX reportedly keeps its Coyote Cove P-cores and Arctic Wolf E-cores and adds a larger iGPU with on-package memory. The standard Razor Lake-S and H variants use newer Griffin Cove P-cores and Golden Eagle E-cores for desktops and laptops. The AX part reportedly skips the big last-level cache rumored for them. Intel positions the AX part against AMD’s Strix Halo and Medusa Halo APUs, the Ryzen AI Max family. Intel has not said whether Razor Lake-AX will appear in laptops and mini PCs. A chip this large needs volume beyond robotics, so a client version looks plausible, and Intel has made no such commitment.
A second reported shuffle points the same way. A September 15 TechPowerUp report, citing leaker Jaykihn via VideoCardz, says Intel pulled the 12 Xe-core graphics configuration out of desktop Nova Lake-S. That’s the family Intel aims at AMD’s Zen 6 desktop parts. Intel now labels that Xe3P configuration “Razor Lake-S 12Xe” internally, and it has not confirmed the move. Together with the shelved Nova Lake-AX, the shift suggests Intel treats graphics configurations as the flexible part of its roadmap. ISVs should treat any leaked iGPU configuration as provisional until Intel ships it.
Figure 1. Razor Lake-AX platform block diagram showing CPU, iGPU, NPU, memory, and interconnect.
The unified memory pool matters to developers. A large iGPU that shares on-package memory with the CPU can hold model weights that would otherwise sit on a discrete card, which simplifies deployment for perception and control stacks. Memory capacity and bandwidth will decide whether that advantage holds up, and Intel has published neither. Intel once described Lunar Lake’s on-package memory as a one-off, so a return would reverse that stance.
ISVs should plan for a heterogeneous target. Workloads will spread across the CPU, GPU, and NPU, and OpenVINO routes work among them. If the iGPU supplies much of the 700 TOPS, as the reports suggest, developers must tune kernels for Xe3P and cannot rely on the NPU alone. That tuning belongs in 2027 plans, because Nova Lake ships first.
Razor Lake-AX is expected to ship in 2028.
CIOs and IT leaders planning robot fleets should read 2028 as two product generations away. Panther Lake and Nova Lake are the parts to buy and validate today, and OpenVINO work done now should carry forward. Intel still owes buyers six answers: the precision behind 700 TOPS, the power envelope, memory capacity, manufacturing source, client-market plans, and the software roadmap for Razor Lake-AX. Those answers will show whether this chip competes with Jetson on measured performance or only on a headline number. Until Intel supplies them, treat Table 2’s “Reported” rows as working assumptions and build the next two years of robotics software on silicon you can buy now.
What do we think?
Intel earns credit for naming a date and a robotics focus. The 700 TOPS figure carries no precision, power, or memory detail, so it supports no comparison with Nvidia’s Jetson Thor. Leaks supply the hardware details, and graphics configurations keep shifting. ISVs should keep building on Panther Lake and OpenVINO, and CIOs should wait for independent results before committing to 2028 designs.
Inflection point. Razor Lake-AX points toward an inflection point in edge AI: Client silicon vendors now size SoCs for robots, physical AI workloads, and laptops alike. One package that combines CPU cores, a large iGPU, and on-package memory challenges discrete-GPU modules such as Nvidia’s Jetson. Intel, AMD, and Nvidia now chase the same physical AI buyers. The inflection point arrives when Intel publishes a precision and a power figure that survive independent testing. Until then, the platform remains a 2028 promise.
We have included Razor Lake in our AI Processor management information system tracker with a note that the specifications may shift when it’s in full production.
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