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MIPS gives physical AI three ways to think

Aimed at inference, event-driven processing, and safety-critical physical AI.

David Harold

MIPS is turning its post-GlobalFoundries strategy into something more tangible, launching three developer platforms aimed at inference, event-driven processing, and safety-critical physical AI. Acies, Actus, and Aegis divide the market by workload rather than processor class, reinforcing MIPS’ shift away from being simply another RISC-V CPU IP supplier. 

(Source: MIPS)

MIPS, now part of GlobalFoundries (GF), has launched three developer platforms designed to take its RISC-V technology further into physical AI, which, in MIPS definition, is intelligence running in machines, vehicles, industrial equipment, and embedded systems rather than predominantly in the cloud.

The three platforms are divided according to the nature of the workload.

MIPS Acies is the inference-focused platform, combining what MIPS describes as an open,-standards-based NPU with an open-software stack and a developer-friendly form factor. It is aimed at modern edge inference workloads.

MIPS Actus is built around event-driven, real-time processing, targeting applications including motion control, sensor fusion, and predictive maintenance.

MIPS Aegis addresses safety-critical physical AI systems requiring low-latency processing and what MIPS describes as agentic capabilities. 

MIPS has been repositioning itself around workload-specific computing rather than selling processor cores largely on architectural merit. CEO Sameer Wasson describes the new approach as software-first, with workload modeling used to guide developers toward an optimized implementation and open, modular technology supplying the underlying compute.

“As intelligence moves into machines, vehicles, and other physical systems, compute platforms need to adapt to the workload,” Wasson said. He added that MIPS wants efficiency and tokens per watt to underpin its approach to physical AI. 

Tokens per watt makes most immediate sense for generative and inference workloads rather than, say, a motor-control loop, but the larger point is sound. Edge systems are rarely optimized around peak compute alone. We think the separation of the portfolio into inference-native, event-native, and safety-native platforms is eminently sensible. It also follows a path MIPS was already establishing before the GF acquisition.

In its collaboration with Cyient Semiconductor, for example, MIPS was already pushing Atlas-based RISC-V technology toward domain-optimized ASICs and ASSPs for motor control, intelligent power delivery, automotive, and industrial systems. At the time, we saw that as evidence of MIPS moving beyond processor IP and toward more complete silicon solutions, particularly in markets where real-time behavior, safety, and customization matter more than having the broadest software ecosystem. 

The GF acquisition reinforced that strategy and added important credibility and heft to MIPS as a company. Our view was that MIPS had been caught in an uncomfortable part of the RISC-V market: too ambitious to remain simply an IP licensor but without the scale or manufacturing resources to push aggressively into silicon by itself. GlobalFoundries changed that equation by giving MIPS access to process technology, packaging, manufacturing, and considerably greater commercial scale. 

Rather than offering a RISC-V core and asking customers to assemble the rest of the system, MIPS wants to begin higher up the stack: understand the workload, model it, provide the software environment, supply the relevant processor and accelerator technology, and ultimately connect that work to GF manufacturing. That is close to a platform business.

MIPS is also making openness part of the pitch. Supporting comments in their PR from AMD and MediaTek stressed RISC-V collaboration, software readiness, and open standards. Those endorsements are helpful for anyone still worried about MIPS’ ecosystem. The commercial test remains whether Acies, Actus, and Aegis move from developer platforms into meaningful production programs. 

The potential reach is considerable. MIPS and GF identify automotive, aerospace, robotics, AI and data center infrastructure, industrial systems, and embedded devices among their targets. The combination with ARC processor technology also gives GF a broader embedded-compute portfolio than MIPS alone represented before the acquisition. 

What do we think?

A couple of years ago, the company still had the difficult task of explaining why the industry needed another RISC-V CPU supplier. Now the company is increasingly building around problems rather than processors.

Inference, real-time event processing, and safety-critical control are genuinely different computing problems. They have different latency requirements, different software assumptions, and very different attitudes toward determinism and failure. Packaging them as separate workload-native platforms is more substantial than simply segmenting one CPU family three ways.

When GlobalFoundries acquired MIPS, we argued that the attraction was not simply owning another processor architecture. RISC-V CPU IP by itself is becoming difficult to differentiate and increasingly difficult to monetize at attractive levels. The more defensible opportunity lies in combining compute IP, software, customization, process technology, and, ultimately, production silicon. Acies, Actus, and Aegis move directly in that direction.

We like the emphasis on software and workload modeling. The history of processor IP is littered with technically impressive architectures that assumed customers would do too much of the hard integration work themselves. Making RISC-V commercially useful increasingly means removing those barriers, not celebrating how open the instruction set is.

GlobalFoundries gives MIPS another advantage here. MIPS can now talk about an open and customizable architecture without leaving customers entirely responsible for turning it into manufacturable silicon. That connection between software, architecture, implementation, packaging, and fab is potentially much more valuable than the CPU core alone.

Developer platforms are not production volumes. MIPS needs design wins, software adoption, and eventually shipping silicon to demonstrate that the strategy works commercially. Acies will also enter an extraordinarily crowded edge-inference market, while Aegis has the additional problem that “agentic” and “safety-critical” sit together somewhat uneasily: Autonomous decision-making is useful, but safety systems ultimately demand predictable, verifiable behavior.

Our earlier view was that MIPS’ move toward vertically integrated, co-developed solutions could give it a way to differentiate in RISC-V, especially in markets where safety, real-time response, efficiency, and customization matter more than sheer ecosystem breadth. This announcement strengthens that view.

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