SiFive moves RISC-V closer to the mainstream
SiFive’s P570 Gen 3 targets the useful middle of RISC-V compute
Tenstorrent goes general-purpose in an age of AI specialization
Company says one system can do the whole inference job.
RISC-V becomes AI hardware’s open foundation
Three integration tracks move RISC-V beyond CPU control.
Banana Pi gives RISC-V an edge AI board for large local LLMs
Launches a 60 TOPS RISC-V AI developer kit.
Q1’26 RISC-V Market Update from Jon Peddie Research
Platform economics drive consolidation as buyers favor integrated deliverables over per-core IP.
SiFive raises again as CPUs return to the center of the AI data center story
$400 million gives SiFive space ahead of a probable IPO.
Codasip bets the company on secure compute
Codasip pivots to CHERI-led cyber resilience after portfolio realignment.
Allen Wu’s open hardware playbook
Interview with Allen Wu, founder and chairman, CoreLab Technology.
Alibaba’s RISC-V CPU runs AI natively
Using vector engine rather than NPU.
Ubitium bets one RISC-V chip can clean up embedded computing’s processor sprawl
Ubitium tapes-out first silicon for its universal embedded processor.
Interview with MIPS: Drew Barbier and James Prior
MIPS’ unlikely rise to deliver RISC-V at ‘foundry scale.’
Interview with Innatera CEO Sumeet Kumar
Spiking neuromorphic for the edge in real devices.