AI could make RISC-V. Could it also break it?
The scale of the AI investment gamble.
SiFive makes the case for RISC-V as the control layer for custom AI accelerators
SiFive positions RISC-V as the control layer for AI accelerators.
Onsemi picks up Codasip’s low-end RISC-V business for $14.5 million
Modest transaction highlights the challenges of monetizing basic processor IP as established semiconductor companies expand their RISC-V capabilities.
Q3’26 RISC-V Market Update from Jon Peddie Research
Qualcomm roadmap puts Tier 1 adoption in focus as RISC-V’s commercial value moves beyond the ISA.
Tenstorrent raises $1.5 billion
Investors back its open-AI computing strategy.
Arm vs. Qualcomm
The court battle exposing RISC-V’s strategic opportunity.
MIPS gives physical AI three ways to think
Aimed at inference, event-driven processing, and safety-critical physical AI.
SiFive opens its Kernel Library to the RISC-V community
SiFive releases optimized RISC-V AI kernels as open source.
Condor flies no more
How an Austin start-up set out to push RISC-V into the data center but fell short.
Andes teaches its RISC-V edge platform to speak transformer
Andes upgrades the AnDLA I370 for ViT, VLM, and small language models at the edge.
Q2’26 RISC-V Market Update from Jon Peddie Research
RISC-V enters the AI silicon fight: Open ISA meets memory, sovereignty, consolidation.
Semidynamics wants to make memory the metric that matters
Semidynamics brings a memory-first inference stack to ISC.