SiFive has released its SiFive Kernel Library (SKL) as an open-source collection of optimized computational routines for RISC-V vector processors. The library targets performance-critical AI and machine learning operations including matrix multiplication, convolution, activation functions, and data movement. SiFive hopes SKL will become a shared repository for optimized RISC-V kernels contributed to and used across the wider ecosystem.

SiFive has launched the SiFive Kernel Library (SKL), pronounced “skill,” as an open-source library of high-performance computational routines for processors using the RISC-V Vector ISA (RVV) and related extensions.
Released under the MIT license, SKL consists of low-level kernels intended to replace performance-critical portions of applications running on SiFive processors as well as other RISC-V vector CPUs. SiFive has previously used the library internally to demonstrate the performance of its Intelligence processor family and is now making the code available to the wider RISC-V developer community.
The initial release concentrates heavily on AI and machine learning workloads. It includes optimized routines for matrix multiplication, nonlinear functions including softmax, SiLU, and GELU, depthwise 2D convolution, matrix packing and transposition, and conversion between several floating-point formats. The library includes implementations using standard RISC-V vector extensions alongside kernels optimized for SiFive-specific extensions and microarchitectures such as the X390.
SiFive has designed the kernels to be easy to incorporate into other software. Individual kernels can be extracted and compiled separately, while projects can also incorporate the complete SKL source tree. The code has minimal external dependencies and is written primarily in C99 using RISC-V vector intrinsics and in-line assembly.
For AI applications, SiFive sees SKL operating underneath higher-level frameworks rather than requiring developers to call individual kernels directly. The company identifies PyTorch and vLLM as integration targets, with optimized SKL routines replacing architecture-specific functions within those frameworks.
SiFive does not intend SKL to remain exclusively a collection of SiFive optimizations. The company is inviting other RISC-V developers and vendors to contribute processor-specific implementations behind common interfaces, potentially giving software projects a single source for optimized routines across different RISC-V implementations.
What do we think?
RISC-V relies on this kind of community contribution. An open ISA is most useful when companies building businesses around it contribute software and optimization work back into the common ecosystem. SiFive has a record of being an exemplary citizen in that respect.
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