SiFive opens its Kernel Library to the RISC-V community
SiFive releases optimized RISC-V AI kernels as open source.
Condor flies no more
How an Austin start-up set out to push RISC-V into the data center but fell short.
SiFive moves RISC-V closer to the mainstream
SiFive’s P570 Gen 3 targets the useful middle of RISC-V compute
SiFive raises again as CPUs return to the center of the AI data center story
$400 million gives SiFive space ahead of a probable IPO.
SiFive adopts Nvidia NVLink Fusion, pushing into AI data-center fabric
SiFive pitches itself as partner for AI heterogeneous systems.
Interview with SiFive’s John Ronco
What next for SiFive?
SiFive refreshes Intelligence series with Gen 2 cores for edge AI
New X100 leads lineup; XM, X200, X300 also get AI-centric upgrades.
SiFive leads RISC-V segment
Expanded features and dev boards.
RISC-V SoC with GPU from Eswin
Available on SiFive’s new developer’s board.
Imagination GPU joins SiFive CPU and in-house NPU in Eswin RISC-V edge computing SoC
RISC-V and a GPU, like chocolate and peanut butter—what could be better?
SiFive Performance P870 and the SiFive Intelligence X390
Latest design update with expanded vector control.