TAI builds edge AI silicon
Reconfigurable chips move inference on-site.
Flex Logix took eFPGA wiring into AI inference
nnMAX tiles and ArrayLinx interconnect deliver 8.4 TOPS at 16 nm.
RISC-V GPUs
Will a RISC-V GPU be risky?
Interview with SiFive’s John Ronco
What next for SiFive?
A 750MHz-class soft GPGPU for FPGA
Uses logic rather than GPU IP in FPGA.