Flex Logix took eFPGA wiring into AI inference
nnMAX tiles and ArrayLinx interconnect deliver 8.4 TOPS at 16 nm.
nnMAX tiles and ArrayLinx interconnect deliver 8.4 TOPS at 16 nm.
Will a RISC-V GPU be risky?
What next for SiFive?
Uses logic rather than GPU IP in FPGA.