Blaize GSP streams AI graphs at the edge
A hardware scheduler replaces the memory bottleneck—16 TOPS at 7 W.
A hardware scheduler replaces the memory bottleneck—16 TOPS at 7 W.
The Jacinto 7 SoC integrates an 8 TOPS MMA, C7x DSPs, and ASIL-D safety in one device.
Designed for multimodal device inference AI applications.
Mixed-signal microcontrollers with TinyEngine NPU.
Nanometers and millivolts-powered NPU.
The company gets more edgy.
It’s hungry, and it’s fast.
New X100 leads lineup; XM, X200, X300 also get AI-centric upgrades.
For IoT and the edge.
A family of edge AI processors.
Edge SoCs for AI inference.
Vice president, head of Gen AI/ML product management.