News

Onsemi picks up Codasip’s low-end RISC-V business for $14.5 million

Modest transaction highlights the challenges of monetizing basic processor IP as established semiconductor companies expand their RISC-V capabilities.

David Harold

Onsemi’s $14.5 million acquisition of Codasip’s low-end RISC-V business highlights the difficulty of extracting value from increasingly commoditized processor IP. Codasip is turning towards CHERI-based security architectures, while Onsemi continues to assemble technologies through acquisitions and licensing. The deal reinforces a central theme of JPR’s latest RISC-V Market Update: the next phase of RISC-V will increasingly be shaped by established semiconductor companies, with value shifting beyond the ISA towards differentiated products and system integration.

Onsemi has completed the acquisition of Codasip’s low-end RISC-V processor business for a reported $14.5 million, according to Czech business publication e15. As stated by e15, approximately 90% of the purchase price has already been paid. The transaction involves just 27 of Codasip’s approximately 260 employees, along with a license to use its Studio processor design tool.

The price has raised questions in the Czech Republic, particularly given Codasip’s history of receiving European and national research funding. However, Codasip argues that the transaction represents a sensible restructuring rather than a distressed sale of valuable technology. Key intellectual property, including ownership of Codasip Studio, remains with the company, along with most of its publicly funded projects.

Codasip originally announced the divestiture in April as part of a strategic shift towards security-focused processor architectures. Onsemi gains a portfolio of lower-end RISC-V processor technology and development expertise that can support its automotive and industrial semiconductor activities.

At the time, we wrote that the announcement strongly suggested “the all-up sale did not happen on acceptable terms, and that management has found a buyer for one portion of the business and is trying to carve out a sharper identity for what remains.” 

Codasip is now fully concentrating on processors incorporating CHERI (Capability Hardware Enhanced RISC Instructions), a technology designed to improve memory safety by enforcing fine-grained protection in hardware. A key competitor in that space is another RISC-V company, SCI Semiconductor, which raised £5 million (approximately US $6.67 million) in September 2026 for its own CHERI processor in a round lead by Mercia Ventures and PXN Ventures.  SCI says it has £7.7 million (approximately US $10.27 million) in government contracts committed. 

In a recent interview with the CHERI Alliance, Codasip CEO Ron Black explained that the company was seeing stronger commercial demand for security-focused designs, particularly in defense and critical national infrastructure. He confirmed that Codasip would no longer concentrate on licensing conventional non-CHERI processors, instead focusing on more sophisticated processor designs, where it sees greater commercial value.

What do we think?

The reported $14.5 million price is striking, even allowing for the limited scope of the transaction. It illustrates a problem for independent RISC-V IP developers: Basic processor cores are increasingly difficult to differentiate and monetize when customers have access to a growing range of commercial and open-source alternatives. Based on that, Codasip’s decision to concentrate on CHERI is understandable. 

Codasip is betting that security, software, and specialized architectures offer better opportunities than selling conventional processor cores—what Ron Black defines as “midrange and high-performance out-of-order processors where there is more demand and value.”

As we say in our latest RISC-V Market Update, the industry is entering a phase in which established semiconductor companies will increasingly shape the direction of RISC-V. The value is moving beyond the instruction set itself, towards implementation and the ability to deliver differentiated products.

Onsemi has been active in acquiring and licensing external technology to expand its capabilities. It licensed Weebit Nano’s ReRAM technology for its Treo analog and mixed-signal platform, and other transactions have included Qorvo’s silicon carbide JFET business and Aura Semiconductor’s Vcore power technology.

Most significantly, Onsemi announced a proposed $7 billion acquisition of Synaptics in June 2026, intended to combine its power and sensing expertise with connected computing, edge AI, and control technologies. Its September 2026 investor presentation outlined an ambitious roadmap spanning automotive, industrial automation, AI data centers, and physical AI.

The Codasip acquisition fits that broader pattern. Onsemi is assembling technologies that can be integrated into increasingly sophisticated systems rather than developing every component internally. RISC-V is one more useful building block in that strategy.

For independent IP suppliers, the economics of conventional RISC-V cores look increasingly challenging. For major semiconductor manufacturers, RISC-V offers a way to control their architectures and potentially reduce their dependence on external processor vendors. (See our Qualcomm vs. Arm story for this at scale).

YOU LIKE THIS KIND OF STUFF? WE HAVE LOTS MORE. TELL YOUR FRIENDS, WE LOVE MEETING NEW PEOPLE.