China’s LineShine tops the TOP500, and it did it without GPUs
China reaches No. 1 with scale, not AI efficiency.
Flex Logix took eFPGA wiring into AI inference
nnMAX tiles and ArrayLinx interconnect deliver 8.4 TOPS at 16 nm.
Arm Ethos-N78 scales NPU IP to 10 TOPS
Second-generation Scylla architecture ships in hundreds of millions of Android SoCs.
Bitmain’s AI chips are real—and radioactive
The Sophon silicon works; the Sophgo entity list designation is the problem.
K210 puts RISC-V AI on the edge in 2018
Kendryte chip proved edge AI inference could run on a coin cell—then Canaan pulled the plug.
AIStorm puts AI inside the image sensor
Charge-domain analog AI skips the ADC.
aiMotive aiWare brings neural IP to automotive ADAS
Budapest's AI start-up ships NPU IP and ADAS software to Tier 1s.
Rebellions bets on memory-centric AI inference
Seoul's AI chip start-up ships ATOM in four markets.
Blaize GSP streams AI graphs at the edge
A hardware scheduler replaces the memory bottleneck—16 TOPS at 7 W.
TI’s TDA4VM puts AI at the automotive edge
The Jacinto 7 SoC integrates an 8 TOPS MMA, C7x DSPs, and ASIL-D safety in one device.
Imagination gets an automotive chiplet story
Imagination joins CHASSIS’ Automotive Base Die project.
Graphcore’s IPU doing well at SoftBank
Bristol's AI chip pioneer trades independence for scale.