RISC-V SoC with GPU from Eswin
Available on SiFive’s new developer’s board.
InspireSemi announces tape-out of RISC-V HPC chip
Thunderbird accelerated computing chip.
Imagination GPU joins SiFive CPU and in-house NPU in Eswin RISC-V edge computing SoC
RISC-V and a GPU, like chocolate and peanut butter—what could be better?
Could Raspberry Pi IPO be a boon for RISC-V?
And maybe even enable a better GPU?
Codasip announces L110 for power-efficient applications
New ‘bounded’ customization in tools.
Will Arm make it to the workstation world?
Ampere offers a dev kit to those who want to try.
Think Silicon demos GPUs for embedded, wearables
Working with Edge Impulse on ML for wearables and AIoT.
Platforms and processors
Some takeovers and expansions.
Imagination launches APXM-6200 RISC-V CPU IP core
Security-focused 64-bit in-order processor.
X-Silicon’s low-power, open-standard, Vulkan-enabled C-GPU
Infusing a RISC-V vector CPU-with-GPU ISA in a single processor.
Codasip announces next-generation 700 family RISC-V processor
A highly flexible family for Custom Compute design.
X-Silicon was x’d before X
GPU start-up brings MIMD to graphics and compute.